Most Intelers can't think straight
Reading the comments there proves again that Intelers have low IQ -- they simply can't think straight.
They are talking about financial prospects, but they keep talking about Intel's 45nm process, without noting the key question: percentage.
Intel launched 65nm in December 2005, so far, it shipped 40 million 65nm chips. Most of which were core duo (32bit) and Presler. 40 million is about 25% of Intel's production. This means after switching to 65nm for one year, 75% of Intel's production was 90nm. If you take into account the ramp, right now, about 50% of Intel's current production is 90nm. By the end of 2007, I expect 25% of Intel CPUs will be stuck at 90nm.
AMD is different. Once it nails the process, it switches over very quickly. APM3.0 does all the magic.
Intel does need its 45nm process to maintain competitive, the only trick it has left is increasing cache size. However, AMD may use Z-RAM to increase cache density 5x.
So while Intelers are dancing like crazy on the 10% performance advantage they enjoy on desktop, AMD is preparing for the next quantum leap that will leave Intel behind forever.
2007 is the year Intel becomes 90% obsolete. On desktop and mobile, Intel solutions are unworthy of Vista, while every AMD solution is Vista Premium ready. Basically, a large chunk of Intel's chipset and IGP business will be useless.
posted by Sharikou, Ph. D. @ 1/03/2007 12:29:00 AM
49 Comments:
Not true at all. At IDF back in November Pat Gelsinger announced that Intel had reached a point where producing more 65nm processors than 90nm. Now, two months later, the percentage of 65nm CPUs would be even larger.
Claiming the only thing Intel can do to remain competitive is to increase the amount of L2 cache is also totally false. They've got 45nm processors coming this year. They've got Yorkfield, the native quad core processor based on a revised Core 2 architecture coming along with a whole slew of dual core processors based on the same revised architecture. In the meantime Intel is phasing out older Netburst CPUs and introducing new low-cost CPUs based on the Core micro-architecture. They have Nehalem coming in 2008, another entirely new architecture.
Sharikou is the king of FUD, that's for sure.
So let's see this 65nm Z-RAM. Revision G with 5x512KB of Z-RAM per core should be fine.
But nothing like this is on the horizon...
Reducing cache die size the wafer output could be even larger than 65nm/300mm shift. What stops AMD to do that? Do you know Sharikou?
It's true that from one year to now Intel makes good, up to date CPUs and AMD makes cabalistic roadmaps. You cannot sell roadmaps, I think. Alas, AMD has losted the quad core wagon, for sure. It's a great strategic mistake don't glue two dual core to "synthetize" a quad core a la Intel. All seems to show AMD in unrecoverable late on each side. I need a fast CPU, not a fast roadmap, sorry for AMD.
Z-RAM can only currently run at 400MHz. I doubt that even having five times more cache is going to make up for the low speed and horrible latency you'd get from a Z-RAM cache - heck, you'd probably get better results by sticking a 16MB DDR-II module on the chip.
AMD can't use Ζ-RAM, as cache, not now, not in 2-3 years. Maybe later. Z-RAM atm is too slow to be used for cpu cache. So forget it sharikou.
"They've got Yorkfield, the native quad core processor based on a revised Core 2 architecture coming along with a whole slew of dual core processors based on the same revised architecture."
If this is all that Intel has got to offer then it is DOOMED!!If you want to find out why, wait till AMD ships its 45nm products!
Wow you really are clueless - Intel's production is more than just CPU's. I'll go you one better...come end of 2008 Intel will still be probably ~20% 90nm...
AMD has "nailed" its 65mn process so well that there will be 4-5 more iterations (CTI - see AMD's own analysts day foils) just to hit 65nm performance targets (which they are nowhere near right now in production). If you were to compare apples to apples AMD will not have a competitive 65nm process to Intel's until at least end of 2007 - putting them 2 years behind Intel on process technology. They just have some smoke and mirror of this "only 1 year behind" by this dumb 65nm shrink, with no actual transistor performance gain over 90nm(again see AMD's OWN FOILS ON THIS!)
Intel started shipping 65nm in Q1'06, COMPLETE crossover (meaning all production not just a fab) was less than 3 quarters later (Q3'06). AMD started shipping in Q4'06 (at least theoretically) and will be luck to hit crossover in Q2'07 which would put them in the same transition time with a lower performing process and doing this on a scale of 1/4 of what Intel did. Before you tell me I'm wrong factor in AMD's F30 production, and also factor in that the overall wafer starts per month is higher than F36 (before your mind starts trying to figure out 300mm size convesion...) and then factor in YIELD!
"the only trick it has left is increasing cache size."
Funny isn't AMD's "claim" about increased memory latency on their 65nm process due to the fact they want to go to bigger cache? If this is not the case why the added latency? K8l will be ~6MB total L2/L3 cache vs Intel's 8MB on their MCM quad core....looks like AMD is starting to copy Intel's approach on cache (both sharing it and using larger cache sizes).
And on technology front you need to do some research on alternative SRAM approaches, there are 1 capacitor/1 transistor approached which also yield ~5X density (as current SRAM is a 6T cell). It also is slightly lower speed than conventional 6T SRAM but then again so is ZRAM. There are many other approaches on increasing SRAM density.
Please try to be more informed on subjects before blogging on them.
I wonder which one of these companies sets the prices for the processor. I would say it is Intel driving prices and Amd having to match no? That being the case then Intel is clearly on the driver seat and can set prices while still meeting their expectations for margins and cost. Amd on the other hand has to follow and is probably sacrificing profit. Q4 results will be out soon and we will see who is "riding" who.
this is a SATIRE site, right?
this is a SATIRE site, right?
pretty much.
Hey sharikou how's that 50% run rate number holding up??? Q4 predictions for AMD and Intel. How about the ultimate BK of Intel, what quarter was that again?
More like, lots of people with nothing better to do come together to rant and counter rant and what not.
"If this is all that Intel has got to offer then it is DOOMED!!If you want to find out why, wait till AMD ships its 45nm products!"
Wait till when??? 2020. They can't even get the 65nm shrink right, now we have to wait till the 45nm.
"this is a SATIRE site, right? "
No. This is the site of a disgruntled ex-Intel employee who was fired for systems abuse. Since Intel harmed him he thought he's give himself a Ph.D and start a site claiming to be an IT journalist.
He is not a ph.d. He can rarely string a coherent, legible, sentence together. His opinions and predictions are malformed with a bias towards AMD in the hopes that he can single handedly bring down Intel.
In other words, Welcome to Sharidouche's Journal of Perverted Dimwit Computing!
"this is a SATIRE site, right?"
Yes it is. Brought to you by our esteemed doctor sharikou and his hilarious comments and predictions. Enjoy!
Quote:"AMD can't use Ζ-RAM, as cache, not now, not in 2-3 years. Maybe later. Z-RAM atm is too slow to be used for cpu cache. "
This is a common myth! ZRAM is fast enough for L2 and L3 caches but not L1.
Quote:"Wait till when??? 2020. They can't even get the 65nm shrink right, now we have to wait till the 45nm."
Who said they haven't got the 65nm shrink right? I think in your case the only relevant shrink, as in psychiatrist, is your own!
"Who said they haven't got the 65nm shrink right? I think in your case the only relevant shrink, as in psychiatrist, is your own!"
Look at the data dude. They did a "dumb" shrink i.e. transistor count stayed the same ~150m transistors but were only able to get a dismal 68% oh and the fact that they are a bit slower doesn't help either.
If this is all that Intel has got to offer then it is DOOMED!!If you want to find out why, wait till AMD ships its 45nm products!
You'll note, fool, I also said "They have Nehalem coming in 2008, another entirely new architecture." Why are you comparing a processor Intel will introduce in 2007 with one that AMD will introduce in 2008?
Quote:"Look at the data dude. They did a "dumb" shrink i.e. transistor count stayed the same ~150m transistors but were only able to get a dismal 68% oh and the fact that they are a bit slower doesn't help either."
Wait for a SHIPPING product-and go see that SHRINK in the meantime!
"Who said they haven't got the 65nm shrink right? I think in your case the only relevant shrink, as in psychiatrist, is your own!"
Well the fact that the old 90nm chip on average performs better then the new 65nm chip due to higher L2 cache latency is an issue that shouldn't of been overlooked by the Amd engineers. They should of tweaked the core a bit to compensate for the higher latency, instead they rushed it out thinking that no one would notice. Now you are seeing several reviews that show the 65nm slower than the 90nm by up to 7%. Another problem that the reviewers are noticing is that by going to 65nm and keeping the core exactly the same as before then Amd theoterically should of gained around 50% more area instead they only gained 30% more area. Now while it is almost impossible to hit 50%, it is very possible to hit 45%. Amd will most definately tweak their 65nm core in the next step to gain more area and to compensate for the cache latency, but as it stands today the only people that benefit from this shrink is Amd and not the customers.
"as it stands today the only people that benefit from this shrink is Amd and not the customers. "
Yeah...what a bunch of dummies...actually trying to make money by selling a part that's cheaper to make....how stupid is that?
Stupid AMD...they should know that their only job is to make a bunch of fanboys happy..not to actually turn a profit.
And hey, making more parts per wafer...what a dumb concept. That might actually increase the number of parts sold and with lower costs, ultimately lead to more revenue and profit.
AMD...what a bunch of dummies
"You'll note, fool, I also said "They have Nehalem coming in 2008, another entirely new architecture." Why are you comparing a processor Intel will introduce in 2007 with one that AMD will introduce in 2008?
"
Hmmm....its Jan 2007 and Nehalem silicon doesn't even exist, but it's going to launch in 2007...hmmm
Do you know anything about Intel's manufacturing and product release timelines?
"They've got Yorkfield, the native quad core processor based on a revised Core 2 architecture coming along "
Yorkfield...native quad core. I guess you define "native" as being 2 devices of the same type slapped down and routed together on package.
Yorkfield = lipstick on a pig
Also, the term 'revised' isn't typically used when a product is effectively a dumb shrink.
Sharikou claims Intels IGP to be useless and not Vista Aero capable...
Take a look here.
And also here, this one was his own link.
Sharikou, what about the 80% of ATI chipset business/revenue that was due to Intel chipsets that is now leaving ATI (AMD)?
Yes, AMD will be able to do platforms, but at what cost to ATI's revenue?
Also in the news today, there are a few people labeling AMD as a sell, seems some OEM's don't like there roadmap and are cancelling orders in the mobile segment, why is that?
The 65nm AMD cores are purely to allow AMD to make more money, or nowadays allow them to cut the price and still make a profit if Intel does so. So in this sense they will be just what the doctor ordered.
However for people in the know it makes more sense to buy one of the 90nm products before they are phased out. The 65nm is slower due to it's strange cache latency increae and if you get a half mulitplier one then it has slower memory speed too. It really is so poor that a 5000+ is slower than an Intel E6400 and costs more.
In regards to profits I think both AMD's and Intels will be up this quarter, both pretty strong, so Intel had better get a move on if they are going to be bankrupt by 2Q 2008.
THE KEYWORD is "WILL"
"The 65nm is slower due to..."
Yeah...dumb AMD. If they could just do really good 90nm to 65nm transitions like Prescott to Cedar Mill, then they'd be hip and cool, cause everyone was raving over the massive performance boost that all the Intel mfg effort produced.
As for the "bankrupt" prediction...who gives a crap. Anyone that's owned Intel stock for any length of time is already practically bankrupt.
Hey, Otellini, where's the GROWTH?
Hmmm....its Jan 2007 and Nehalem silicon doesn't even exist, but it's going to launch in 2007...hmmm
I never said Nehalem is coming in 2007, you clod. I said it was coming in 2008! Pat Gelsinger confirmed that in his interview with Hexus.net. He said something along the lines of "We're currently working on the Nehalem project, and that's on target for delivery in 2008."
You were the one that tried to compare Yorksfield - a processor coming sometime in the second half of 2007, to an AMD 45nm processor that's coming in 2008!
Yorkfield...native quad core. I guess you define "native" as being 2 devices of the same type slapped down and routed together on package.
Yorkfield = lipstick on a pig
Also, the term 'revised' isn't typically used when a product is effectively a dumb shrink.
Everyone knows that Intel is working on a native quad core processor for desktops and servers. Both are based on the REVISED Core architecture. Yes it is a REVISED architecture, not a dumb shrink. This REVISED architecture offers SSE4, greater floating point performance and a larger L2 cache amongst other things. Did I mention anywhere yet that the 45nm products are a REVISED version, not just a dumb shrink?
The REVISED version may not be a huge change compared with something like the REVISIONS that AMD is making on the K8 architecture (K8L). But it is still a REVISION. Do you understand that yet!?
You, sir, are a grade A idiot. Even more so than Sharikou.
As for the "bankrupt" prediction...who gives a crap. Anyone that's owned Intel stock for any length of time is already practically bankrupt.
Yep, all those Intel shareholders are bankrupt. Nevermind the AMD shareholders. AMD going from over $40 share price to under $20 as it is right now doesn't matter. Woe betide Intel though, should their share price drop by even five cents!
Yeah...dumb AMD. If they could just do really good 90nm to 65nm transitions like Prescott to Cedar Mill, then they'd be hip and cool, cause everyone was raving over the massive performance boost that all the Intel mfg effort produced.
You'll note that most people are not complaining that AMD has done a "dumb shrink" of K8, but that the 65nm version of K8 is ~5% slower than the 90nm version. Prescott to Cedar Mill was a dumb shrink, the only advantage to Intel was that it is cheaper to produce than Prescott and didn't run nearly as hot. Would you believe that no one denied that!?
"I never said Nehalem is coming in 2007"
Read the wording of your response and then go take a remedial english class you illiterate maroon.
"Pat Gelsinger confirmed that in his interview with Hexus.net."
Pat also confirmed that he's incompetent...just read some previous interviews like the one he did a while back at Tom's Hardware. If you don't come away horrified for Intel and its employees, then you need a clue.
"He said something along the lines of "We're currently working on the Nehalem project, and that's on target for delivery in 2008."
If you belive that, then maybe you can answer the following: when was the last totally new Intel architecture w/ a bus change that went from A0 silicon to production launch in less than 1.5 years?
"Everyone knows that Intel is working on a native quad core processor for desktops and servers....blah blah blah."
As for the Yorkfield response...totally different post you bonehead. However, to answer you, you are either misinformed or a total idiot. Yorkfield, which you referred to as a 'native quad core' is not a 'native quad core'. Its 2 dual core die glued to a package w/ routing inbetween to hook them up. This is called a "kludge" to avoid doing si design work that would impact schedules and resources. Get a clue as to what you are talking about.
As for REVISED, Yorkfield is effectively a dumb shrink of Kentsfield.
Beware the Intel spin machine. They would spin a problem with wetting themselves as prevention for a jellyfish sting, while standing in the Mojave Desert.
"You, sir, are a grade A idiot. Even more so than Sharikou."
I'm all broke up now...maybe I'll cry myself to sleep tonight...HAHAHHAHAHA
"AMD going from over $40 share price to under $20 as it is right now doesn't matter. Woe betide Intel though, should their share price drop by even five cents!"
Try looking at stock charts of more than 1 year view....and then appologize to all the Intel share holders that bought at over $75, then at almost $40, then at $35, then again at $28 and are now sitting at $20...wow, that is soooo much better than AMD. Oh, by the way, a bunch of those people work at Intel.
"You'll note that most people are not complaining that AMD has done a "dumb shrink" of K8, but that the 65nm version of K8 is ~5% slower than the 90nm version."
So what. Did AMD ever claim its first 65nm parts were intended to outperform the 90nm parts out the gate? Or perhaps they are building them, so they can build MORE parts than with 90nm and fill volume orders which don't demand the top speed parts. Then, they might later work on transistor improvements to get faster parts out of their 65nm process. Thereby maximizing their ROI on the 65nm process with improved TTM.
Meanwhile, some seem impressed that Intel launched a fully flushed out 65nm process in Q1'06. This is interesting when you look at the performance difference between Prescott & Cedar Mill. If you were AMD would you really want to wait around for a finalized si process to launch a cost reduction program targeted at volume production shipments (shrink to 65nm) for that kind of performance difference?
Please be honest.
Quote:"You'll note, fool, I also said "They have Nehalem coming in 2008, another entirely new architecture."
I know exactly what you said, MORON.
Let me repeat, if this is all Intel have to offer then they are DOOMED!!
If you understood anything about microarchitecture you would know why.
"This is a common myth! ZRAM is fast enough for L2 and L3 caches but not L1."
Now as AMD lowered its L2 cache latency lowering it even further with zram won't seem as a big loss I guess.
"Yorkfield...native quad core. I guess you define "native" as being 2 devices of the same type slapped down and routed together on package. "
Yourkfield will have its entire L2 cache shared between all cores.
"If you were AMD would you really want to wait around for a finalized si process to launch a cost reduction program targeted at volume production shipments (shrink to 65nm) for that kind of performance difference?"
Let's be honest - this it's not like AMD has this option...it will be AT LEAST a year for their 65nm to get to performance so no it is not an option given they are capacity constrained.
However, one would think, if there truly were no process/technology issues they could have just released a shrink of the 90nm process with no increase in latency. This "we are adding it in case we need it down the line for more cache" is bunk - while it is not much of a noticeable difference, why put it in now when there is no roadmap intercept for this magical large cache product?
I live on the West Coast but I'm thinking about purchasing some tornado insurance in case I move to the midwest. Sure I could always just get the insurance when I actually move, but why wait? The cost is negligible so might as well do it now...
Brisbane is a dumb shrink. Scratch that, a stupid shrink that didn't turn out as small as it was supposed to and is slower.
"Let's be honest - this it's not like AMD has this option...it will be AT LEAST a year for their 65nm to get to performance so no it is not an option given they are capacity constrained."
EXACTLY...they are capacity constrained, which is why launching 65nm even if its not fully dialed is the smart move. They get to pump out more volume, make more money and profit and hammer Intel on market share.
They could take the Intel approach of waiting until its fully shaken out, then copy exact, but they'd lose tons of cash....that would be a stupid move.
How about that 130nm Northwood to 90nm Prescott conversion....would you really recommend following that approach? How late was that again? How many prelaunch steppings were there?
Sure I could always get tornado insurance before a tornado comes, but why bother? I don't need it until there is a tornado so why not wait till there is one and call it in just before it hits...
"Brisbane is a dumb shrink. Scratch that, a stupid shrink that didn't turn out as small as it was supposed to and is slower. "
Better for AMD to be stupid and make lots of money, than smart and remain poor...unless you are Intel. Are you?
"EXACTLY...they are capacity constrained, which is why launching 65nm even if its not fully dialed is the smart move. They get to pump out more volume, make more money and profit and hammer Intel on market share."
I know sharikou would say otherwise but when you do a shrink, die yields always take a huge hit so they might not necessarily be putting out more chips now then before.
AMD does not do good on the first runs on a new process they still need to get the kinks out.
Where to begin with the Pretender BS
1) AMD currently owns not one single performance benchmark...
2) The overall market cares not about 8 core servers. Joe Best Buy and Teenager Freeloading at home Gamer teenager wants the fastest dual/quadcore chip and that is INTEL.
3) Intel Core 2 frags anything that AMD can offer today. Thats why prices on AMD chips are down > 50%
4) Where is Barcelona? Where is al l that 65nm fancy APM stuff that is 20% faster on 65nm vs 90nm AMD? No where and no faster. AMD / IBM SOI is a dud! AMD/IBM SOI 65nm is slower and inferior to INTEL 90nm.
AMD got nothing.. only if INTEL fucks up will AMD have chance.
2007 will see no Z-ram, a barcelona that has 2 month of spotlight before INTEL 45nm penrym blows it way....
Ho Ho Ho
AMD currently owns not one single performance benchmark...
Not true. In FP performance, a 2P dual core Opteron frags a 2P clovertown, that's 4 cores fragging 8 Clovertown cores. That's compelling performance advantage.
"How about that 130nm Northwood to 90nm Prescott conversion....would you really recommend following that approach? How late was that again? How many prelaunch steppings were there?"
This is a TERRIBLE analogy as it had nothing to do with maturity of 90nm process but the poor Prescott design! The steppings were due to thermal issues in the Prescott design. (And before you say it could have been a process issue look no further than Intel's mobile parts which did not have this same issue)
AMD is taking a proven design and adding in SRAM latency during a shrink!?! The only reasonable explanation is their is a process issue.
"Better for AMD to be stupid and make lots of money, than smart and remain poor...unless you are Intel. Are you?"
And to the person who posted this - why not use a shrink which retained same latency as the previous technology node!?! The latency is not there by DESIGN but by difficulties with their process technology (or AMD just doesn't know how to do a simple shrink which I find hard to believe)
OK folks let's try to at least put a little thought into "we're designing in the possibility of larger cache" theory:
While performance impact is rather small, the latency increases by >60% going from 12 to 20 cycles.
How could this happen?
1. Your path could be much longer (which would seemingly not make sense as 65nm should actually SHORTEN the path length)
2. Your parasitic capacitances are worse (line to line). This could be an ILD issue or if you are packing wires closer together and don't scale the ILD dielectric constant accordingly to account for this.
3. Your resistance of your lines went WAY up due to metallization issue (unlikely)
I just don't see how it could be a path length issue - AMD has demonstrated low latencies on 1MB/core 90nm products, given the (presumably) shorter path lengths with switch to 65nm AMD should be able to go nearly 2X (2MB/core) without that much of a latency hit (they certainly should not see a 60+% hit).
To me this seems like a dielectric issue or possibly a patterning issue at contact or somewhere in metal layers1-3.
Con and M1 litho would get much more aggressive with 65nm conversion. I would think M2/M3 should be under control from patterning perspective (should be no worse than M1 from previous technology node) although these are layers that typically the metal layers that hit you in terms of RC delays. If AMD were having patterning issue this could effect a # of issues...
Anyone with a background in processing in general have any thoughts. (or folks on design side?)
One would think if this truly were we want to possibly add more cache later someone with a technical background at AMD would provide more technical detail.
It will be interesting if AMD disclose any info on K8l latencies when thet provide a more detailed architecture update (I think I read somewhere that this should happen shortly). As that has 1MB cache it will be interesting to see if that latency is 20 cycles... (I don't think it will be)
"Where is Barcelona? Where is all that 65nm fancy APM stuff that is 20% faster on 65nm vs 90nm AMD? No where and no faster. AMD / IBM SOI is a dud! AMD/IBM SOI 65nm is slower and inferior to INTEL 90nm."
I don't think it's a matter of IBM's 65nm process being inferior, it's just that other than lithography the majority of it has not yet been implemented by AMD, despite their so called 65nm process. While AMD has converted to 65nm printing, they are still using essentially a 90nm process technology with an extra metal layer and will only be implementing the process improvements in gradual steps (probably take over a year to get to final performance).
On the Positive side:
- AMD can get more die/wafer which should help economically (assuming yield is reasonable, which it probably is as they haven't implemented much yet on the 65nm process technology side)
- AMD PR folks can say "we are only a year behind our competition". This of course is crap because transistor perfomance on this initial process rev is similar to 90nm - the reality is they are still a full tech node(2 years) behind Intel as when they finally have their 65nm process hitting ITRS roadmap it will be end of 2007 which is when Intel is planning on releasing first 45nm product (at ITRS process targets from the outset)
On the negative side:
- It will take a while to start cranking up the expected clock speed gains.
- Design will not be quite optimized for the process (look no further than the first 65nm shrink to see this!)
- Yield may fluctuate as the new process improvements are implemented (CTI approach). While a lot of this can be validated with SRAM and other misc test structures, a lot of the changes (like the stress changes) are very product/pattern sensitive and leaves AMD susceptible to potential yield excursions during these CTI transitions.
Poor AMD..
As to the comment about how could latency be so bad. Serious process problem. Remember IBM / AMD boasted about signficant K reduction for their BE. Looks like scaling to 65nm even with that so great K caused some other serious unforecated concequences. Not good for Barcelona as that same issue will surprise them there too.... Poor AMD
Lithography is probably the most complext and critical elment for the next node. I find it interesting that anyone would invest all that silicon, spin new design rules, device models for a shrink with slow transistors and then do it all over again. AMD is the last company that has the people and time to do things twice. The simple answer as to why things are slow is that their process is slow and has serious issue. Either the knobs like strain dont' work or yield so bad they are stuck with the dummies shrink. Its no wonder Charter is making CPUs for them. Any Chink with a few billiion can buy canned tools and recipes from AMAT, Novelus, ASML, TEL and plug a nd play a 65nm process that is butt slow. That is what AMD has, a butt slow, low yielding process. Its a small die, low power but also low performing... No wonder Barcelona TO has occured, silicon is in hand and we see not ONE demo of it. Its because it is totally non-fuctional and slow ....
Whats the risk of showing it if it works? INTEL going to turn a Penrym 2 with a new architecture in 6 months.. just like they did with Core2 to fix Netbust? NOPE. The reason there is nothing from AMD is because they got nothing...
Looks like they've reverted back to their old days of incompetence. Even IBM can't help them as IBM is no good in silicon any more either.
Quote: "Poor AMD.."
Poor Intel. A memory company that simply hasn't learnt how to design a good CPU.This is why they had to resort to Mafia tactics to sell their crap all these years.I wonder where they learnt these tactics???
Rich INTEL...
Go and plot INTEL and AMD stock for the past 20 years.. See who is rich and who is poor.
Sum up the ledger sheets from the same 20 years. See who has made money every year and who has lost money in most years.
Yup Poor AMD.
You stupid or what?
"Poor Intel. A memory company that simply hasn't learnt how to design a good CPU.This is why they had to resort to Mafia tactics to sell their crap all these years.I wonder where they learnt these tactics??? "
Learnt? I think you need to go hit the schoolhouse some more there, redneck, and then go study some CPU history.
AMD copied Intel in their design of their first x86 CPU's...
There - I hope *you've* "LEARNT" something....
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