AMD FAB36 ramped to 13000wspm
See FAB Tech analysis here, which concluded that FAB36 has ramped to 13,000 wspm. Dirk Meyer said current output is 10,000 wafers per month. The difference is wafer starts and wafer outs.
See FAB Tech analysis here, which concluded that FAB36 has ramped to 13,000 wspm. Dirk Meyer said current output is 10,000 wafers per month. The difference is wafer starts and wafer outs.
21 Comments:
Sharikou, I knew you would link this.
As long as the news is good for AMD FAB Tech is credible source, sad man... just plain sad.
In case your wondering when you didn't think of them as credible, here it is...
"If there is a material adverse effect, AMD is obliged to inform investors. So unless they change their original position, all those crap semi retarded analysis are retarded. For instance, AMD said next gen quad core in mid 2007. A whole bunch of crackpots said it would be 2008. Who is right? Huh? Who knows more?
...
Same apply here on this half witted FABtech dude.
11:30 PM, September 16, 2006"
Also here is the link that we were discussing.
How about that, its the same author...lmao
The real question is will you post this?
Wow that should pop some shirts in the fandom that don't beleave AMD can pull off such a great leap in a single bound. This is pretty bullet proof...
Oh wow - 13K wspm. that's nothing - they need to run triple that to be competitive.
Hi Sharkie, what do you mean with "The difference [of 3000 wafers - Jotty] is wafer starts and wafer outs"?
3000 wafers get trashed on their way through the fab and are therefore lost? Or 3000 wafers come out of nothing during the process (maybe some wafers have a bit of fun and produce offspring)?
Who cares about AMD's crappy fabs? Intel has four state of the art 65nm fabs. AMD's fabs are old news. Intel has 45nm coming next year. At this rate they'll be at 45nm before AMD reaches 65nm!
Wow, how can this be even a mildly controversial subject? It's just a statement of fact. They're at 13000, and the difference in wafers in and wafers out is that this month they got 10000 wafers out and put 13000 wafers in. He's not arguing about fabtech's analysis (or even quoting it) or providing any of his own. He didn't even say this was an achievement (though I'm assuming he's implying that). So what happens? "OMG, you said this guy's analysis sucks so you automatically think everything he says is a lie so you're a hypocrit because you quoted him" (anyone ever heard of fallacy by the way?).
And then of course there's someone saying something about this ramp rate being pathetic or something and having no idea what he's talking about. Oh ya, almost forgot about mr. "die shrinks are the only part of the process that actually shows a companies ability to produce and because Intel tells us absolutely nothing about their fabs we should assume they're way better than AMD's".
Look, I'm not saying you guys are morons, I'm saying you should actually put some thought into what you know you can contribute to an argument or whether or not you even know enough to contribute to an argument or whether or not there is an argument to contribute to.
If this post gets deleted I perfectly understand because I neither intend to defend sharikou in general or say that he has no idea what he's talking about. I just think it's pretty pathetic that so many of you hold yourselves above sharikou just because he makes way out there predictions and is a little full of himself. He's a blogger, what can you expect?
Why, after shoving Netbust down people throats for nearly 6 years now and 2 process shrinks in 5 years between Q401 to Q206, do fanbois believe Intel's new roadmaps with so many new cores, 45nm next year, CSI, teraflop, etc.
And netbust was their first all new core in 5 yrs.
Don't believe what they say, look at what they do.
Are you joking 13,000 WSPM
Damm that is very very bad news for AMD. There are nowhere near where they need to be to get the learning and cost advantages they need on 65nm. I expect some big hiccups on them as they try and ramp huge 65nm multi-core die. Looks like INTEL will be sitting pretty for most of 2007 if all they got is 13K right now.
Damm that AMD stock will be in the teens when Q1'07 finanicals are released.
Some of these Intel employees (it's either that of they really have issues) don't have a clue about AMD's fab technology. Fab36 was designed, tool sets included, for 45nm. It requires some changes, but it doesn't require all new equipment. More importantly, AMD demonstrated 45nm SRAM cells just 3 months behind Intel. They aren't that far behind, and it takes Intel forever to reach the crossover point.
Think about this, Intel has been on 65nm for nearly a year. They just hit crossover on 65nm. AMD hasn't volume shipped 65nm CPU's yet (will very soon), but plan to hit the crossover point in 1Q07, just months from now. What does that say?
And think about the fact that AMD is beating Intel in margins with 90nm parts, many on 200mm wafers. When AMD's production becomes primarily 65nm on 300mm wafers, think about how much more that will lower AMD's costs. Intel is in a bad position and they keep making bad moves. Just because many stock holders and analysts are too fixated on margins and didn't see the bigger picture in the numbers (AMD is still gaining share and margins will be back up, especially once 65nm ships in volume), doesn't mean they are right. The stock market is full of idiots, and AMD's drop in stock price proves it.
Some joker said:
"Are you joking 13,000 WSPM
Damm that is very very bad news for AMD"
Fab36 was only intended for 20k wspm, not the 30k that Fab30 does.
A monkey said
"Don't believe what they say, look at what they do."
Deliver billion dollar profit quarters... What did AMD deliver? loses upon losses oh yeah two quarters of profit now.. I'm impressed...
A techo idiot said
"AMD demonstrated 45nm SRAM cells just 3 months behind Intel. "
Really what annoucement was that? I recalled a hastly called conference by the AMD/IBM VP after INTEL annouced a fully functional 45nm SRAM about how they were working on 45nm. Since then there have been NO annoucement of anything from AMD.. Show me the link where they have annouced the AMD45nm fully functional / yielding testchips. There won't be a link because they don't have it didn't have it and won't have it for another year.
GO back and get a clue about AMD technology
Then the idiot says "And think about the fact that AMD is beating Intel in margins with 90nm parts, many on 200mm wafers. When AMD's production becomes primarily 65nm on 300mm wafers, think about how much more that will lower AMD's costs."
Did you know INTEL has flash, chipset, Itanium, communciations, and other lower margin business and a ton more volume at the lower price point. They still made more then a billion while also building two 45nm factories...
Where is AMD 65nm? Can't be found.. By they time they have 65nm in volume INTEL will be starting 45nm. Get over the AMD beats INTEL with 90nm. AMD beats no one right now. THey have no benchmarks, have no leadership in nothing.
Richard P said...
"AMD hasn't volume shipped 65nm CPU's yet (will very soon), but plan to hit the crossover point in 1Q07, just months from now..."
Do you have a link for this?
Thanks
PS: How about those Bucs getting that first win, I hope they can build off of that.
Some stoner said:
"Deliver billion dollar profit quarters... What did AMD deliver? loses upon losses oh yeah two quarters of profit now.. I'm impressed..."
Besides being simplistic (read stupid) and wrong, the one thing this implies is Intel's huge advantage in the market and yet stoner's like you have had to stockpile quips for 5 years in the hopes of one day using them. All that advantage(money, fabs, marketing, name recognition, fanbois), they should have squashed AMD like MS did Netscape. Instead a Co. an eighth its size is a quarter of the market and its one generation old proc. is still the best mainstream(read <$200)chip on the market.
Richard P said...
"AMD hasn't volume shipped 65nm CPU's yet (will very soon), but plan to hit the crossover point in 1Q07, just months from now..."
Do you have a link for this?
I'm not Richard P., but I think he infered it from the Conference Call comment that they would be mostly 65 nm by midyear and first parts would ship 4Q. If you are about 5% converted in 4Q and about 90% converted in 2Q/3Q, you have to be about 50% by the end of 1Q.
enumae,
link:
http://www.amd.com/us-en/assets/content_type/DownloadableAssets/DarylOstranderAMDAnalystDay.pdf
Go to page six. Full conversion is expected to be done by July. AMD is ramping 65nm quite quickly. APM is a big help in that area, and this is why Intel's process advantage (time line wise) isn't as big as some think. 45nm will be even shorter, I would think.
Yeah, it's nice to get that first win. Should have happened against the Panthers, but the defense blew it. Then the special teams blew the lead on the Saints. Tough game tomorrow, but I'll be there (season ticket holder).
"Go to page six. Full conversion is expected to be done by July. AMD is ramping 65nm quite quickly. APM is a big help in that area, and this is why Intel's process advantage (time line wise) isn't as big as some think."
This is just F36 - and sice this fab was never fully built out on 90nm, achieving crossover in a single fab is not that big a deal in 1-2 quarters...
Consider F30 is at what ~30K WPSM at 90nm and F36 is at what ~13K (which means crossover is ~6500WPM). Even if you factor in 200mm vs 300mm; overall 65nm crossover won't be until at least mid-year.
Compare that to Intel which started shipping 65nm in Jan and crossed over (with much greater manufacturing volumes and many more fabs) in ~9 months and this is quite similar but on a significantly larger scale - which in my view is more impressive than converting a single, not-fully built out fab.
"Fab36 was designed, tool sets included, for 45nm."
I believe IBM/AMD has stated they will be using 193nm immersion litho for 45nm node. As these tools go for somewhere on the order of $45mil/tool if they are using these tools for 65nm and 90nm then they are truly stupid. Many of the tools will be re-used between tech nodes but not all...
"
This is just F36 - and sice this fab was never fully built out on 90nm, achieving crossover in a single fab is not that big a deal in 1-2 quarters..."
You must have missed the part about Fab 30 being shutdown and converted to become Fab 38.
The simple fact is AMD waits longer to start volume producing on a new process but ramps it up much faster. They have to be extremely efficient or Intel would have killed them off.
Sharikou:
If F36 30 is at 30K WPSM which can supply ~20% of the market, and F36 is now at 10K WPSM output why are there AMD shortages, unless AMD is over 30% market share? (Which I don't think they are)
10K 300mm WSPM is ~ 20K 200mm WPSM, sprinkle in some (~25%) of that being 65nm vs 90nm and that's probably around 25K WPSM (equivalent 90nm 200m wafers).
So AMD should be able to supply ~30-35% of the market right now, no? Why do you think they are not at this level if they are selling every chip they make (and inventory is fairly low) and why are there shortages?
Unless there are yield issues or packaging issues, AMD should be well over 30% by now, no?
If F36 30 is at 30K WPSM which can supply ~20% of the market, and F36 is now at 10K WPSM output why are there AMD shortages, unless AMD is over 30% market share?
There is a time lag between wafer out and finished chip. We should see AMD making a big jump in mkt share.
"There is a time lag between wafer out and finished chip. We should see AMD making a big jump in mkt share."
And this is how long? It still makes no sense with your market calculations and previous capacity analysis. If F30 is suppplying enough for over 20% of the market, you are then saying F36 makes only ~5% (assuming your 25% market calc is correct) for Q3?
This would mean F36 is well under 1/8 of F30 capacity for Q3 (factoring in 300mm vs 200mm). This would mean ~4000WSPM wafer out average over the quarter (+ packaging time).
Are you really saying the F36 ramp is going that slow? (sounds odd considering AMD claims 10000WSPM outs right now).
Just how long is it between wafer out and packaging?
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