INTEL's next generation Merom may have no legs

INTEL renewed its pledge to the sinking Itanium by piling up $10 billion more on the dead horse. With AMD ready to introduce mainframe class Socket F 1207 Opteron capable of up to 32P glueless ccNUMA, INTEL is getting pushed into the ultra low end in the server space. The coming INTEL Dempsey processor will be no more than an imitation of the old Athlon MP, and will be only capable of 2P operation. Since INTEL's FSB can't scale up to more than 4 cores, and a 2P Bensley paltform with Dempsey or Woodcrest already has 4 cores, INTEL is running into an architectural limitation. With Dempsey, INTEL may get closer to AMD at 2P. However, once AMD introduces quad-core, even assuming INTEL introduces quad-core the same time, INTEL will still be inferior at every level, from 1P and up. The Merom 4 issue core won't change this picture at all, due to the same oudated FSB architecture. Itanium is also FSB based, but its EPIC instruction set requires little branching, and its massive cache may be able to help a bit. Clearly, INTEL's further reliance on Itanium is a sign that the Merom core based server technology won't do any miracles.