Tuesday, July 18, 2006

SGI is a reflection of the Itanium

SGI became a pure Itanium play, and it went bankrupt because of it. Intel is proudly presenting SGI as the proof that Itanium rules.

I wonder why Intel didn't invest a couple million bucks in SGI, so the world's only pure Itanium backer can at least feed its workers without incurring debt.

14 Comments:

Anonymous Anonymous said...

That is job. Try understanding why IBM would support the itanic..

http://theinquirer.net/default.aspx?article=33115

Food for thought.

12:17 PM, July 18, 2006  
Anonymous Anonymous said...

Maybe AMD should put out an Opteron with 24MB cache on the chip.

It would be interesting to see how it compares vs. Itanic.

If it compares well, it would be the end of Itanic, once and for all.

12:55 PM, July 18, 2006  
Anonymous Anonymous said...

Out here in the real world, SGI went kaput because commodity PC's started competing with the super-expensive stuff they were trying to sell.

But if it amuses you, in your little world, to blame Itanium then rock on.

1:05 PM, July 18, 2006  
Anonymous Edward said...

"Out here in the real world, SGI went kaput because commodity PC's (which are probably Opteron-based) started competing with the super-expensive stuff (which are mostly likely the Itaniums) they were trying to sell."

It's a beautiful world, isn't it?

2:42 PM, July 18, 2006  
Anonymous Anonymous said...

Considering number of Itanium CPUs sold in history, Itanium is hardly matter in the industry.

Making Opteron with 24MB cache to proving it supermery is a pretty expensive move.

Having said that, that would be fun.

4:17 PM, July 18, 2006  
Anonymous Anonymous said...

Itanium has ~1.7 billion transistors. Am I missing something, or does IBM's manufacturing process for PS3's cell suck? How many transistors does the Cell processor have? What is Itanium's yield ratio?

Opteron doesn't require Itanium's huge cache because it has the integrated memory controller which drastically reduces memory lag. Itanium needs the huge cache because it is still based on a dated Front Side Bus architecture which becomes a bottleneck when you try to process tons of bits. Without the cache, the chip would starve for bits.

6:24 PM, July 18, 2006  
Anonymous Anonymous said...

How many of Itanium's ~1.7 billion transistors account for the 24MB cache?

6:30 PM, July 18, 2006  
Anonymous Anonymous said...

Ladies and Gents:

I am the HR person who attended the "firing" of Sharikou from his job back in October of 2005.

Sharikou, would you like to shed some light on that or should I?

7:54 PM, July 18, 2006  
Anonymous BigBadWolf said...

"Maybe AMD should put out an Opteron with 24MB cache on the chip.

It would be interesting to see how it compares vs. Itanic."

Good idea but i doubt if Opteron will support RAS features like Itanic does , for one thing.

Any thoughts?

10:21 PM, July 18, 2006  
Anonymous Jeach! said...

" Maybe AMD should put out an Opteron with 24MB cache on the chip."

If AMD did that, I'm sure that the entire die with 24MB of cache ould be smaller than just the Itanium die without the cache.

Isn't the Itanium still being made at like 130nm? Or has it actually progressed to 90nm now?

Either way, I encourage Intel to keep producing these useless chips! Just more distractions, costs, losses, employees, etc, etc, etc.

10:22 PM, July 18, 2006  
Anonymous BigBadWolf said...

If IBM can't get past that horrible figure of 20% Yields for its cell on 65 nm( for now at least),Keeping in view of its technological superiority ,

http://www.theinquirer.net/default.aspx?article=32978

How on earth Intel could be doing any better than that for conro and co.

11:14 PM, July 18, 2006  
Anonymous Anonymous said...

"Opteron doesn't require Itanium's huge cache because it has the integrated memory controller which drastically reduces memory lag. Itanium needs the huge cache because it is still based on a dated Front Side Bus architecture which becomes a bottleneck when you try to process tons of bits. Without the cache, the chip would starve for bits."

That's not quite right. The real reason why Itanium needs huge caches is because each block of IA64 code is six times larger than a functionally similar x86 code block. The 24MB cache on Montecito is, for all intents and purposes, only about as big as the one on Conroe!

2:41 AM, July 19, 2006  
Anonymous Anonymous said...

"Out here in the real world, SGI went kaput because commodity PC's (which are probably Opteron-based) started competing with the super-expensive stuff (which are mostly likely the Itaniums) they were trying to sell."

It's a beautiful world, isn't it?


Oooh, sorry. You seem to suffer "don't know crap"-ism. SGI sold normal PC's basically dressed up with the SGI name. The problem is that it became silly to buy a $10000 SGI "PC" when you could buy a normal PC for $3000 that was just as powerful.

Itanium was relegated to SGI's very high end and had litle to do with their downfall.

But thanks for playing.

12:29 PM, July 19, 2006  
Anonymous Anonymous said...

How many of Itanium's ~1.7 billion transistors account for the 24MB cache?

Let's do some simple math... assuming the 24MB is a 6 transitor SRAM.

1 million bytes = 8 million bits
24 MB = 192 million bits

192,000,000 x 6 (transistor per bit of info) = 1,152,000,000

So... that leaves:
1.7 billion - 1.152 billion = 548 million transistors doing real work.

8:58 PM, July 19, 2006  

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