Saturday, February 11, 2006

INTEL next generation server CPU stuck at 32 bit

Recent reports showed that INTEL is readying its next generation Sossaman Xeon LV built on a 65 nm process. SuperMicro proudly announced support of this leading edge 32 bit IA32 technology based on 1995 Pentium Pro in an era of pervasive 64 bit computing.

Back in 2003, four INTEL teams had studied doing 64 bit on Pentium and concluded that was not possible. After the release of AMD 's 64 bit Opteron, reverse engineering the AMD's 64 bit instructions has been proven a tough job for INTEL engineers. INTEL's first attempt was to emulate AMD64 on Pentium 4, as Pentium 4 has 36 bit physical address and is easy to pretend to be more than 32 bit. AMD Opteron has 40 bit physical address and allows 1TB of memory, the CPUID instruction on the Opteron is set to report 40 to the OS, so the OS knows the capabilities of the CPU. Although Pentium 4 and Xeons have only 36 bit address, INTEL engineers blindly copied AMD's instructions, thus INTEL's clone also reported 40 bits, instead of 36. This caused 64 bit version of Windows and Linux to crash miserably on INTEL. As of today, INTEL's so called EM64T on Pentium 4 is still missing crucial features in AMD64 and performs slower in 64 bit mode than 32 bit mode.

Since INTEL is set to terminate all Pentium 4 based CPUs and will base everything on the Merom architecture. It has to start the cloning of AMD64 afresh. Since Merom is based on Pentium Pro core , and is physically 32 bit (unlike Pentium 4's 36 bit), emulating 64 bit on P3 is proven to be even harder than doing it on Pentium 4.

INTEL has to comfort customers and analysts by claiming that two 32 bit INTEL cores together is better than one 64 bit core, as if two 286s (16 bit) are better than one 486(32 bit). Although INTEL has promised 64 bit support for the Merom architecture set to release in 4Q06, its continuing deemphasis on 64 bit on the eve of Windows Vista raises concerns that INTEL's implmentation may have compatibility issues with the x86_64(or AMD64) standard.

In any case, running a 2P server with Sossaman32 CPUs inevitably creates a substantial imbalance between CPU power and memory capacity: 4 high speed 2GHZ Cores fighting for a maximum of 4GB memory is not a pretty sight in any server configuration. The situation is especially dire for Sossaman32 users who run memory demanding processes such as J2EE, JSP, .NET, ASP, PHP, LAMP web applications, database servers, concurrent transactional apps and other data intensive applications. The shared 667MHZ front side bus provides a meager 166MHZ average bandwidth to each Sossaman32 core for memory and I/O, which is another major bottleneck.

AMD exited 32 bit mainstream market long ago. Its 32 bit product line is only for embedded market. The AMD GeodeNX is actually a 32 bit K7.

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