Thursday, August 24, 2006

AMD needs to do a spy hunt

Reading the book "Inside Intel", one story struck me. There was an Intel FAB technician who stole a lot of gold -- in the form of tiny grains which he made into gold bars. Following a lead, Intel determined to nail him -- orders were given from the very top. An Intel manager and his girl friend spent several months stealing the trash from this guy's home, to be sorted on his kitchen table. Finally, they found evidence -- a correspondence from a gold shop. Police raided the guy's home and found unfinished gold bars and a machine to make them.

Strangely, Intel did not press charges against the guy. Instead, he was given very good references at Intel and found a job in an AMD FAB.

I wondered what the guy did in exchange for years in jail. I bet there were many similar cases.

In 2004, AMD was readying a dual core, somehow, Intel heard of it and rushed to deliver a double core.

According to this INQ story, the K8L name first came out from Intel, even before some AMD guys knew of it.

In mid 2007, AMD will introduce true quad-core described by Phil Hester in the June tech analyst meeting. It's unclear whether that's the K8L. In any case, Intel is in a helluva rush to push double dual core(Colvertown). They knew something.


21 Comments:

Anonymous enumae said...

If they had a spy, where was he during P4 days? lol.

10:43 AM, August 24, 2006  
Anonymous Wirmish said...

Inside AMD fabs...

-Please open your mouth.
-Like that ?
-Yes, you're ok... NEXT!

-Please open your mouth.
-No problem sir...
-You're ok, NEXT!

-Please open your mouth.
-Hummmm...
-Ha ha! You have a golden tooth!
Puts your hands on the wall sucker !

10:53 AM, August 24, 2006  
Blogger pointer said...

Overall, there are a few things to think about, not the least of which is Intel named an AMD processor

May be Intel really named it after all :). It is generic for the industry to name a competitor chip internally (when its name is not made public). intel might know AMD is working on a chip, based on K8. Why intel knew it? asked yourself why you know Intel is working on a 32nm chip with name such as such, or possible feature such and such.

In any case, Intel is in a helluva rush to push double dual core(Colvertown). They knew something.

Good try on creating the conspiracy. No matter what, under current fierce competition, Intel, or AMD will rush their product out to win the market. after had had many miss stepping last few years, intel is more focus now. See all the chips that intel launch recently, a lot are pull-in.

12:02 PM, August 24, 2006  
Anonymous Anonymous said...

In the analogy the phrase the AMD won’t be

“an elephant drinking through a soda straw when it comes to memory accesses”.

Referring to Intel FSB is actually tech poetry.

QUESTION; If Intel had secrete private knowledge of future AMD’s chips , how come after 3 years Conroe & Woodcrest is the best they could do? I’m having a problem with the story because Intel would have fix there anemic architecture (FSB) years ago.

12:24 PM, August 24, 2006  
Anonymous Anonymous said...

QUESTION; If Intel had secrete private knowledge of future AMD’s chips , how come after 3 years Conroe & Woodcrest is the best they could do? I’m having a problem with the story because Intel would have fix there anemic architecture (FSB) years ago.

AMD's new processes and arcs are beyond Intels knolage or capability to copy, reverse engineer, or munipulate in any way. Plus they can't even do true 64-bit yet. Sad really, Intel can learn something here but guess they arn't smart enough, they just managed to copy some of K8's into conroe. lol Some mix of tech from 1999 and 2003 sure payed intel off big huh? *Rolls eyes*

2:15 PM, August 24, 2006  
Blogger Sharikou, Ph. D said...

If Intel had secrete private knowledge of future AMD’s chips , how come after 3 years Conroe & Woodcrest is the best they could do?

Answer: Intel engineers are retarded. I bet Paul O is shouting at them to get something done, but their IQ is a limiting factor.

2:19 PM, August 24, 2006  
Anonymous Anonymous said...

There was much ado about the K8L/quad core parts taping out a week or so ago, once again, go team. A week of intensive digging has lead me to believe this part is not the native quad core dual FP beast commonly referred to as K8L. That part looks like it was delayed to Q1/08. No yay team there.

In that article it saids that the quad core planned for 2007 and that recently taped out is not a "native" quad core.

3:14 PM, August 24, 2006  
Anonymous Anonymous said...

In any case, Intel is in a helluva rush to push double dual core(Colvertown). They knew something.

In the article, they indicated that the 1333MHz FSB has been confirmed for Intel quad cores. In that case, Cloverton is not to be ignored. While it may not have all the bandwidth that it needs, it won't be bandwidth "starved" as it would have been with a 1067MHz FSB. It'll probably offer very good performance especially if K8L is actually for 2008.

3:17 PM, August 24, 2006  
Anonymous enumae said...

Sharikou, Ph. D said...

"Answer: Intel engineers are retarded. I bet Paul O is shouting at them to get something done, but their IQ is a limiting factor."

Thats a pretty bold statement, but it would seem the type of statement only an uneducated person would make, not some one with a Ph.D.

I enjoy your blog, but comments like this are a complete waste.

Explain to us why you are so smart.

What Intel beating chip have you designed?

4:37 PM, August 24, 2006  
Anonymous n4cr @work said...

pointer said... : intel is more focus now. See all the chips that intel launch recently, a lot are pull-in.

*Cough* RAID 5.

Sure buddy....

5:53 PM, August 24, 2006  
Anonymous Anonymous said...

Why K8L..

Its a no brainer..

PhD pretender can you figure it out?

K7, then K8, then K9.

Get it can't have a processor named after a dog.

Remember when AMD processors were named after fighter planes or something. They had to change that to make sure they didn't offend the easily hurt germans...

6:27 PM, August 24, 2006  
Anonymous Anonymous said...

At 1067mhz FSB quad core won't be bandwith starved. look here

http://www.xtremesystems.org/forums/showthread.php?p=1527807

9:10 PM, August 24, 2006  
Anonymous Anonymous said...

what is this blog entry?

a setup if intel does well then it was all due to intel spying on amd?

or a distraction from the undocumented functions now on both intel and amd chips that can spy on everyone?

or a prelude to talking about the spyware microsoft has built into windows that gives them the information and access they sell to the US, Chinese, and Israeli governments?

what might be more interesting is not documenting all the spyware, but coming up with some way of dealing with it.

10:23 PM, August 24, 2006  
Anonymous Wirmish said...

Something strange here...

Energy Efficient Athlon 64 X2 CPU
-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~

X-Bit Labs, 08/02/2006 :
http://www.xbitlabs.com/articles/cpu/display/amd-energy-efficient.html

Page 8 : "What you see on the chart is a complete failure of the K8 architecture."

"Athlon 64 X2 processors cannot blame their specific design, namely the integrated memory controller, for this failure."

-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~

LostCircuits, 08/20/2006 :
http://www.lostcircuits.com/cpu/low_e/

page 14 : "When it comes to performance per W, one thing is absolute sure, the "ADD" series sets completely new standards. Granted that the overall performance is lower than that of AMD's high end CPUs but there is still enough horsepower for about anything and in terms of energy-efficiency they are nothing short of breathtaking."

Memory Subsystem :
Page 8 : "One aspect of the memory subsystem in the Core2 Duo that was somewhat puzzling was the relatively low performance in terms of raw bandwidth"

-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~

Why X-Bit Labs conclusion is so different then the LostCircuit one ?

Maybe some man in blue give a small brown bag to X-Bit...

11:38 PM, August 24, 2006  
Anonymous Edward said...

"Why X-Bit Labs conclusion is so different then the LostCircuit one ?

Maybe some man in blue give a small brown bag to X-Bit...
"

Definitely! X-Bit Labs earlier had an article proving with a stupid artificial program that there is no inter-core communication between two A64 X2 cores. They read from one core, read from another, then flush the cache. The result: there is not need for inter-core communication, which is never going to happen in any real-world multi-threaded application. But they reuse this article and make such false claim again and again.

12:29 AM, August 25, 2006  
Blogger Bruno Dieter Chan said...

http://www.theinquirer.net/default.aspx?article=33936

Well spies or not... the quad cores are out.

2:54 AM, August 25, 2006  
Anonymous Anonymous said...

Failure of K8 Arc? Where? AMD kicked intels ass for 3 years. Thats some failure man! WOW! Can't beleave that good old 3 YEAR OLD K8 Arcitecture suddenly FAILED?! AND Conroe is so much faster in 64-bit aps... RIGHT...

Some CPU it is. Go ahead and stay on 32-bit. Thats the only advantage duo2 has. No where else! Mahahahaha. Now you can sure talk about failures. Like of intels FAKE CRAPPY 64-Bit instructions.

How do you decrease in 64-bit performance anyways? Isn't it sipose to improve over 32-bit performance not degrade. lol 64-bit makes conroe like it worse clock for clock then AMD's in 32-bit mode. Atleast AMD's actouly see a nice performance difference in 64bit.

4:36 AM, August 25, 2006  
Blogger Kalle said...

"The result: there is not need for inter-core communication, which is never going to happen in any real-world multi-threaded application."

Inter-core would mean that in a single-core CPU there would be no communication inside the CPU? Or perhaps you meant "no communication between cores"? If so then what did you mean by "which is never going to happen in any real-world multi-threaded application"? If you meant that there is no syncing between CPU's/cores in real-world you are so wrong that it is not even funny.

About the xbit tests, they do seem a bit weird but it would take me a while to understand exactly what they did. It would have been so much easier if they had used the HW events every CPU since P1 has for measuring things like cache misses. Had they done it there would be no arguing about the matter.

7:21 AM, August 25, 2006  
Anonymous Anonymous said...

You know according to recent reports/rumours the quad core chip that was taped out was actually K8 Rev G based and not K8L Rev F based.

http://www.theinquirer.net/default.aspx?article=33906

There was much ado about the K8L/quad core parts taping out a week or so ago, once again, go team. A week of intensive digging has lead me to believe this part is not the native quad core dual FP beast commonly referred to as K8L. That part looks like it was delayed to Q1/08. No yay team there.

http://www.theinquirer.net/default.aspx?article=33936

AMD IS OFFICALLY calling the quad cores Rev G, so now you know.

While it is still technically a "native" quad core, since they use a internal crossbar it won't be the "true native" quad core since it won't have K8L's shared L3 cache and improved crossbar. They're really all marketing terms anyways. Still, internal communications through a crossbar originally designed for 2 cores yet housing 4 cores probably isn't great although still better than a dual die FSB approach.

The down side is that AMD is not going to have a new core in 2007, or at least have it until the waning days of 2007 if everything goes swimmingly.

Seems that K8L may not be out until closer to 2008 afterall.

8:05 AM, August 25, 2006  
Anonymous Anonymous said...

Why X-Bit Labs conclusion is so different then the LostCircuit one ?

Maybe some man in blue give a small brown bag to X-Bit...


In terms of the IMC, X-Bit Labs was talking about the power draw increase to the CPU that results from it compared to having an off-die one. The IMC also prevents the CPU from fully powering down since it can be in use from the GPU and other components while the CPU itself isn't doing much.

What Lost-Circuits was saying is that raw memory bandwidth is lower than K8's IMC which is obvious and is nothing new. The raw bandwidth is also lower than a 1067MHz FSB Presler, but still higher than 800MHz FSB Presler's. The Core architecture isn't as bandwidth hungry as Netburst which is why the raw bandwidth is lower. In Core's case some bandwidth was traded for better latency and everything is hidden by the strong prefetchers and large shared cache anyways.

8:10 AM, August 25, 2006  
Blogger pointer said...

*Cough* RAID 5.


all days long u only update your techno news on sharikou's blog? No wonder ... *cough*

8:37 AM, August 25, 2006  

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